Semiconductor packages are used in many applications to house and protect a variety of integrated circuits, such as controllers, ASIC devices, sensors, etc. One particular kind of semiconductor package is a molded cavity package. Typically, the package includes electrically conductive leads for connecting the integrated circuits to an external device. The leads may be bent or flat. An electrically insulating molding compound that is formed around the leads provides the cavity of the package. The cavity provides a three dimensional interior volume that accommodates one or more integrated circuits. Once the integrated circuit is placed in the cavity and connected to the leads, the cavity is sealed by a lid.
A semiconductor package should protect the integrated circuit from potentially damaging environmental conditions, such as extreme temperature variations, moisture, dust particles, etc., while simultaneously providing an electrical interface between the integrated circuit and the parent circuit, e.g., PCB (printed circuit board). Packaging of sensor devices, such as MEMs (micro-electromechanical systems) sensor devices presents unique challenges because these devices are typically used to measure external environmental parameters such as temperature, pressure, sound, composition of atmosphere, etc. The sensor elements typically require at least partial exposure to the exterior environment so that the environmental parameter can be measured. Meanwhile, the rest of the circuitry and electrical connections associated with the MEMs device should ideally be protected from the exterior environment.
One area of focus in semiconductor packaging relates to EMI (electro-magnetic-interference) protection. EMI refers to external and unpredictable RF signals that may be present in the environment in which the integrated circuit is operating. These RF signals can potentially distort the electronic signaling of the integrated circuit and can cause complete failure. One technique for protecting the integrated circuit from EMI involves electromagnetic shielding in which a conductive shield structure that is maintained at a constant potential (e.g., GND) is interposed between the integrated circuit and the exterior environment. In particular, the lid of the package may be formed from an electrical conductor and provide an EMI shield. However, there are several drawbacks to this technique. First, the inclusion of metal in the lid adds cost and complexity to the package manufacturing process. In particular, batch processing of the lid attachment process is typically not possible, as the lid must be precisely placed and an adhesive must be used. In some cases, the seal between the lid and the package is compromised and the package must be discarded. Moreover, these metal lids are not easily shrunk and therefore limit the scalability of the device.
Another design consideration in semiconductor packaging relates to the orientation of the package, relative to the article to which the package is connected (e.g., a PCB). Some applications require electrical connections to be made on the bottom side of the package, opposite from the lid. Other applications prefer the top side of the package to face and electrically connect with the PCB. For example, in MEMs applications, some users may prefer a port-facing-down configuration whereas other users prefer a port-facing-up configuration. The semiconductor package can be individually tailored to meet these configurations, but this lowers production volume and increases expense. Alternatively, the package can have a universal design. In that case, the package requires electrical connections in the vertical direction, i.e., from the top to the bottom. This adds cost and complexity to the design.